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[Expired] Senior Design Engineer (Ref: Snp/SDE/JS)

Posted On :26 Sep 2013


Job Summary

  • Salary:   Undisclosed
  • Work Type: Permanent / Full Time
  • Min. Education Level: Degree
  • Field of Study: Electrical & Electronic Engineering
  • Years of Experience: 3
  • Skills: C/C++, Communications skills

Job Descriptions


  • RTL design and verification of display drivers, touch IC and high-speed serial interfaces
  • Define verification strategy and develop test plan
  • Build UVM testbench environment and testcases
  • Support FPGA validation and silicon evaluation


  • Bachelor degree or above in Electronic Engineering or equivalent
  • At least 3 years of hands-on experience in Verilog RTL development and UVM verification methodology
  • Strong design and programming skills, and proficient in scripting
  • Experience in C++, or other object-oriented programming is preferred

About This Company

We are a leading display IC multinational company providing solutions that enable a wide range of display applications for cellular phones, computer monitors, flat panel TVs and other innovative products in the global market. As the Group''s first research and development center outside Greater China, our Singapore Design Technology Center specialises in IP, IC and systems development for mobile multimedia applications.

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